Overview
We are seeking an experienced Application Specific Integrated Circuit (ASIC) Design Engineer to take end-to-end ownership of next-generation processor architecture. In this hybrid role, you will work closely with a forward-thinking technology company specializing in AI-based quantum computing. Your expertise will shape everything from algorithms and instruction set architecture through to microarchitecture and silicon bring-up, enabling significant architectural contributions to advanced computing platforms.
Responsibilities
- Define system-level architecture, instruction sets, and dataflow models based on workload requirements.
- Develop functional simulations and performance models using Python, C++ or equivalent to inform architectural decisions.
- Analyze arithmetic implementation, programmability, fixed-function hardware, and host-system requirements.
- Define detailed specifications for RTL requirements, memory hierarchy, and hardware/software interfaces.
- Lead architectural partitioning and trade-off analysis across timing, power, and area, with an understanding of physical design.
- Oversee internal IP development and evaluate third-party IP.
- Guide the design through verification strategies, sign-off, tape-out, and silicon bring-up.
Requirements
- Proven architectural ownership of at least one ASIC through successful tape-out.
- Experience with compute accelerators, inference engines, DSPs, or comparable processor architectures.
- Strong hands-on performance modelling and simulation skills using Python, C++, or equivalent.
- Familiarity with industry-standard EDA tools and flows such as Synopsys, Cadence, or Siemens.
- Solid understanding of architectural trade-offs involving timing, power, and area.
- Experience in defining hardware/software interfaces and collaborating with firmware and compiler teams.
- Strong RTL design experience and the ability to define verification strategies at an architectural level.